Application and evaluation of the RF charge-pumping technique

In this paper, we will discuss the extendibility of the charge-pumping (CP) technique toward frequencies up to 4 GHz. Such high frequencies are attractive when a significant gate leakage current flows, obscuring the CP current at lower pumping frequencies.\ud It is shown that using RF gate excitation, accurate CP curves can be obtained on MOS devices with a leakage current density exceeding 1 A•cm−2 . A theoretical analysis of the trap response to RF gate voltage signals is presented, giving a clear insight on the benefits and limitations of the technique.\u

Special Section on the 2008 International Conference on Microelectronic Test Structure

The 13 papers in this special section were originally presented at the 2008 International Conference on Microelectronic Test Structures (ICMTS), held in Edinburgh, UK

Interface trap response to RF charge pumping measurements

In this paper we will discuss the interface trap response to CP measurements at RF gate excitation. An explanation is given on how to accurately perform RF CP measurements, using an improved technique. Based on the observed response of the pumped charge per cycle with increasing frequencies a model is developed that is able to explain the observed roll-off. It is an extension to the well known classical model and it takes into account both the limited capture rates as well as a distribution of traps in the oxide

TFTs as photodetectors for optical interconnects

In this work we are looking at the prospect of using poly-silicon based Thin Film Transistors (TFTs) as photodetectors for optical interconnects that can detect light effectively at 1100nm wavelength from silicon based Light Emitting Diodes (LEDs). These TFTs were fabricated from laser crystallized silicon and were characterized under darkness and illumination. The photosensitivities of these devices were limited due to the presence of aluminium as their gate electrode but have shown us the possibility of a new approach to photodetection

Impact of hot-carrier degradation on the low-frequency noise in MOSFETs under steady-state and periodic large-signal excitation

This letter reports the diagnostic power of the low-frequency noise analysis (steady-state and periodic large-signal excitation) in MOSFETs subjected to hot-carrier degradation. The LF noise under periodic large-signal excitation is shown to increase more rapidly than the LF noise in steady-state. Moreover the improvement in the LF noise performance due to periodic large-signal excitation, observed for fresh devices, gradually diminishes as the devices are subjected to hot-carrier stress

TCAD analysis of wide-spectrum waveguide in high-voltage SOI CMOS

A TCAD based analysis is presented on the transmission efficiency η of silicon-on-insulator (SOI) and silicon nitride slab waveguides in a high-voltage standard SOI-CMOS technology, for the spectral range of 480 nm - 1300 nm, and isotropic optical excitation via monolithic Si-based LEDs. The effects of geometry, wavelength and galvanic isolation on η are reported

Deep reactive ion etching of in situ boron doped LPCVD Ge_0.7Si_0.3 using SF₆ and O₂ plasma

This paper reports on deep reactive ion etching (DRIE) of in situ highly boron doped low pressure chemical vapor deposited Ge0.7Si0.3 alloy in SF6 and O2 plasma. The effect of RF power, SF6 flow, O2 flow and temperature on the etch rate of Ge0.7Si0.3 films with a boron concentration of 2.1 × 1021 atoms/cm3 is investigated. Optimized conditions for a combination of a vertical etch profile and a high selectivity towards PECVD oxide are reported. The effect of boron doping concentration on the etch rate is also investigated. The etch rate is found to decrease with an increase in the dopant concentration. The developed SF6 and O2 based DRIE recipes are applied to fabricate GeSi microresonators

The effect of dislocation loops on the light emission of silicon LEDs

Recently, different and apparently contradicting results were published regarding the influence of crystal defects on the light emission efficiency of silicon LEDs at room temperature (Wai Lek Ng). In this paper we report our results on light emission of silicon p/sup +/n diodes with various defect engineering approaches. The p/sup +/ region was formed either by ion implantation or by diffusion; and optionally, additional lattice damage was created by silicon ion implantation. The experiments clearly indicate that lattice defects have a detrimental effect on light emission, contrary to the results published in recent years